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FUJITSU M3093DG User Manual

Page 53

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a. Synchronous transfer from target to initiator

If the I/O signal is true (transfer to the initiator), the target shall first drive the
DB (7>0, P) signals to their desired values, wait at least one deskew delay plus
one cable skew delay, then assert the REQ signals. The DB (7>0, P) signals shall
be held valid for a minimum of one deskew delay plus one cable skew delay plus
one hold time after the assertion of the REQ signal. The target shall assert the
REQ signal for a minimum of an assertion period. The target may then negate
the REQ signals within one hold time of the transition of the REQ signal to true.
The initiator shall then respond with an ACK pulse.

REQ

DB

Deskew Delay +

Cable Skew

Deskew Delay + Hold Time +

Cable Skew Delay

I/O

b. Synchronous transfer from initiator to target

If the I/O signal is false (transfer to the target), the initiator shall transfer one
byte for each REQ pulse received. After receiving the leading edge of a REQ
pulse, the initiator shall first drive the DB (7>0, P) signals to their desired
values, delay at least one deskew delay plus one cable skew delay, then assert
the ACK signal. The initiator shall hold the DB (7>0, P) signals valid for at least
one deskew delay plus one cable skew delay plus one hold time after the
assertion of the ACK signal. The initiator shall assert the ACK signal for a
minimum of an assertion period. The initiator may then negate the ACK signal
and may one hold time of the transition of the ACK signal to true.

ACK

DB

Deskew Delay +

Cable Skew

Deskew Delay + Hold Time +

Cable Skew Delay

I/O

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