Comtech EF Data MD2401 User Manual

Page 56

MD2401 L-Band Multi Demod Installation and Operation Manual

User Interfaces

MN-MD2401

4–24

Revision 7

0 = 75 ohms, 1 = 50 Ohms

0 = Disable Interleaver, 1 = Enable Interleaver

Status Bytes

<1>

Revision Number

Alarm 1

Alarm 2

Alarm 3

Alarm 4

Common Alarm

Decimal Point Implied

Bit 0 = Receive Processor Fault
Bit 1 = Signal Lock Fault
Bit 2 = Receive Satellite AIS Fault
Bit 3 = Rx AGC Input Level Fault
Bit 4 = Reed-Solomon Sync Fault
Bit 5 = Reed-Solomon Excessive Errors Fault
Bit 6 = Reed-Solomon Uncorrectable Word Fault
Bit 7 = Receive Forced Alarm
(0 = Pass, 1 = Fail)

Bit 0 = Buffer Underflow
Bit 1 = Buffer Overflow
Bit 2 = Buffer Under 10%
Bit 3 = Buffer Over 90%
Bit 4 = Receive FPGA Fault
Bit 5 = Rx LNB Fault, LBST Only
Bits 6 - 7 Spares
(0 = Pass, 1 = Fail)

Bit 0 = IF Synthesizer Lock Detect Fault
Bit 1 = Rx Oversample PLL Lock Detect Fault
Bit 2 = Buffer Clock PLL Lock Detect Fault
Bit 3 = Viterbi Decoder Lock Fault
Bit 4 = Sequential Decoder Lock Fault
Bit 5 = Rx 2047 Test Pattern Lock Fault
Bit 6 = External Reference PLL Lock Fault
Bit 7 = Frame Sync/Multiframe Sync Fault
(0 = Pass, 1 = Fail)

Bit 0 = Buffer Clock Activity Detect Fault
Bit 1 = External BNC Activity Detect Fault
Bit 2 = Rx Satellite Clock Activity Detect Fault
Bit 3 = External Reference PLL Activity Fault
Bit 4 = High Stability Activity Detect Fault
Bit 5 = High Stability PLL Fault
Bit 6 = Eb/No Threshold Fault
Bit 7 = Spare
(0 = Pass, 1 = Fail)

Bit 0 = -12 V Alarm
Bit 1 = +12 V Alarm
Bit 2 = +5 V Alarm
Bit 3 = Temperature
Bit 4 = Interface FPGA Fault
Bit 5 = Battery Fault
Bit 6 = RAM/ROM Fault
Bit 7 = Spare
(0 = Pass, 1 = Fail)