Apex20k_local_routing_source – Altera Quartus II Settings File User Manual
Page 952

APEX20K_LOCAL_ROUTING_SOURCE
Specifies that the fan-out(s) of an input pin connected to logic elements, or the fan-out(s) of a logic
element connected to output pin(s), should be fed via shared local interconnect lines. If the Local Routing
Source assignment is turned on for a pin, local routing occurs only for the cells placed in adjacent LABs to
which local routing is possible. If the Local Routing Source assignment is turned on for a logic element,
local routing occurs only for the output pins that are adjacent to the LAB containing the logic element.
Altera recommends that you make an explicit location assignment to the cells (input, output, logic
element) to guarantee they are placed in a suitable location for local routing. You can connect logic on a
speed-critical path using local routing to maximize the project performance.
Old Name
USE_LOCAL
Type
Boolean
Device Support
This setting can be used in projects targeting any Altera device family.
Notes
None
Syntax
set_instance_assignment -name APEX20K_LOCAL_ROUTING_SOURCE -to
952
APEX20K_LOCAL_ROUTING_SOURCE
MNL-Q21005
2015.05.04
Altera Corporation
Quartus Settings File Reference Manual