Eda_maintain_design_hierarchy – Altera Quartus II Settings File User Manual
Page 364
EDA_MAINTAIN_DESIGN_HIERARCHY
Maintain the original user design hierarchy when generating Verilog or VHDL simulation netlist for the
project.
Type
Enumeration
Values
• OFF
• ON
• PARTITION_ONLY
Device Support
This setting can be used in projects targeting any Altera device family.
Notes
This assignment is included in the Fitter report.
Syntax
set_global_assignment -name EDA_MAINTAIN_DESIGN_HIERARCHY -section_id
set_global_assignment -name EDA_MAINTAIN_DESIGN_HIERARCHY -entity
Default Value
OFF, requires section identifier
364
EDA_MAINTAIN_DESIGN_HIERARCHY
MNL-Q21005
2015.05.04
Altera Corporation
Quartus Settings File Reference Manual
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