Insert_additional_logic_cell – Altera Quartus II Settings File User Manual
Page 614
INSERT_ADDITIONAL_LOGIC_CELL
Allows the Compiler to insert an additional logic cell after the output(s) of the logic function to which it is
applied, provided that the function is implemented as one logic cell. This option allows you to insert logic
cells for routing purposes without adding LCELL primitives to the design. If this option is applied to a
mega- or macrofunction, it operates on all outputs of the function. This option is ignored if it is applied to
a logic function that is not already implemented in a macrocell(s). For example, if it is applied to an AND
gate, it does not force the AND gate to be the output of a logic cell.
Type
Boolean
Device Support
This setting can be used in projects targeting any Altera device family.
Notes
None
Syntax
set_instance_assignment -name INSERT_ADDITIONAL_LOGIC_CELL -to
614
INSERT_ADDITIONAL_LOGIC_CELL
MNL-Q21005
2015.05.04
Altera Corporation
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