Analog devices corporation external a/d support – Altera Stratix II EP2S180 DSP Development Board User Manual
Page 53

Altera Corporation
Core Version a.b.c variable
2–45
Stratix II EP2S180 DSP Development Board Reference Manual
Board Components & Interfaces
Table 2–37
lists reference information for the RS-232C transciever device.
Analog Devices Corporation External A/D Support
The Stratix II EP2S180 DSP development board supports Analog Devices
A/D converters via two 40-pin 0.1-inch digital I/O headers (J5, J6). These
two dual-purpose digital I/O headers can support a maximum of the
following three converters.
■
Two AD9433 converters
■
Two AD6645 converters
■
One AD9430 converter
lists the pin-outs for the ADI connectors.
Table 2–37. RS-232C Interface Device Reference
Item
Description
Board reference
U41
Part number
MAX221E
Device description
RS-232 transceiver
Voltage
3.3 V
Manufacturer
Maxim
Manufacturer web
site
www.maxim-ic.com
Table 2–38. ADI Connector (J5, J6) Pin-Outs (Part 1
of 2)
ADI Signal Name
Stratix II Pin
Adi_D0
L3
Adi_D1
L4
Adi_D2
N4
Adi_D3
N5
Adi_D4
M3
Adi_D5
M4
Adi_D6
L1
Adi_D7
L2
Adi_D8
N2
Adi_D9
N3
Adi_D10
M1
- MAX 10 JTAG (15 pages)
- MAX 10 Power (21 pages)
- Unique Chip ID (12 pages)
- Remote Update IP Core (43 pages)
- Device-Specific Power Delivery Network (28 pages)
- Device-Specific Power Delivery Network (32 pages)
- Hybrid Memory Cube Controller (69 pages)
- ALTDQ_DQS IP (117 pages)
- MAX 10 Embedded Memory (71 pages)
- MAX 10 Embedded Multipliers (37 pages)
- MAX 10 Clocking and PLL (86 pages)
- MAX 10 FPGA (26 pages)
- MAX 10 FPGA (56 pages)
- USB-Blaster II (22 pages)
- GPIO (22 pages)
- LVDS SERDES (27 pages)
- User Flash Memory (33 pages)
- ALTDQ_DQS2 (100 pages)
- Avalon Tri-State Conduit Components (18 pages)
- Cyclone V Avalon-MM (166 pages)
- Cyclone III FPGA Starter Kit (36 pages)
- Cyclone V Avalon-ST (248 pages)
- Stratix V Avalon-ST (286 pages)
- Stratix V Avalon-ST (293 pages)
- DDR3 SDRAM High-Performance Controller and ALTMEMPHY IP (10 pages)
- Arria 10 Avalon-ST (275 pages)
- Avalon Verification IP Suite (224 pages)
- Avalon Verification IP Suite (178 pages)
- FFT MegaCore Function (50 pages)
- DDR2 SDRAM High-Performance Controllers and ALTMEMPHY IP (140 pages)
- Floating-Point (157 pages)
- Integer Arithmetic IP (157 pages)
- Embedded Peripherals IP (336 pages)
- JESD204B IP (158 pages)
- Low Latency Ethernet 10G MAC (109 pages)
- LVDS SERDES Transmitter / Receiver (72 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (3 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (80 pages)
- IP Compiler for PCI Express (372 pages)
- Parallel Flash Loader IP (57 pages)
- Nios II C2H Compiler (138 pages)
- RAM-Based Shift Register (26 pages)
- RAM Initializer (36 pages)
- Phase-Locked Loop Reconfiguration IP Core (51 pages)
- DCFIFO (28 pages)