Altera Stratix II EP2S180 DSP Development Board User Manual
Page 40

2–32
Core Version a.b.c variable
Altera Corporation
Stratix II EP2S180 DSP Development Board Reference Manual
Board Components
SE_A12
AL22
SE_A13
AJ22
SE_A14
AH22
SE_A15
AL23
SE_A16
AL24
SE_A17
AJ25
SE_A18
AH25
SE_A19
AL25
SE_D0
AD18
SE_D1
AB18
SE_D2
AB19
SE_D3
AC20
SE_D4
AD20
SE_D5
AE20
SE_D6
AB20
SE_D7
AF20
SE_D8
AC21
SE_D9
AD21
SE_D10
AB21
SE_D11
AE21
SE_D12
AG20
SE_D13
AF21
SE_D14
AD22
SE_D15
AF22
SE_D16
AE22
SE_D17
AC17
SE_D18
AE19
SE_D19
AD19
SE_D20
AC18
SE_D21
AB17
SE_D22
AC19
SE_D23
AL26
SE_D24
AL27
Table 2–26. Ethernet MAC/PHY (U16) (Part 2
of 3)
Pin Name
Pin Number
See also other documents in the category Altera Measuring instruments:
- MAX 10 JTAG (15 pages)
- MAX 10 Power (21 pages)
- Unique Chip ID (12 pages)
- Remote Update IP Core (43 pages)
- Device-Specific Power Delivery Network (28 pages)
- Device-Specific Power Delivery Network (32 pages)
- Hybrid Memory Cube Controller (69 pages)
- ALTDQ_DQS IP (117 pages)
- MAX 10 Embedded Memory (71 pages)
- MAX 10 Embedded Multipliers (37 pages)
- MAX 10 Clocking and PLL (86 pages)
- MAX 10 FPGA (26 pages)
- MAX 10 FPGA (56 pages)
- USB-Blaster II (22 pages)
- GPIO (22 pages)
- LVDS SERDES (27 pages)
- User Flash Memory (33 pages)
- ALTDQ_DQS2 (100 pages)
- Avalon Tri-State Conduit Components (18 pages)
- Cyclone V Avalon-MM (166 pages)
- Cyclone III FPGA Starter Kit (36 pages)
- Cyclone V Avalon-ST (248 pages)
- Stratix V Avalon-ST (286 pages)
- Stratix V Avalon-ST (293 pages)
- DDR3 SDRAM High-Performance Controller and ALTMEMPHY IP (10 pages)
- Arria 10 Avalon-ST (275 pages)
- Avalon Verification IP Suite (224 pages)
- Avalon Verification IP Suite (178 pages)
- FFT MegaCore Function (50 pages)
- DDR2 SDRAM High-Performance Controllers and ALTMEMPHY IP (140 pages)
- Floating-Point (157 pages)
- Integer Arithmetic IP (157 pages)
- Embedded Peripherals IP (336 pages)
- JESD204B IP (158 pages)
- Low Latency Ethernet 10G MAC (109 pages)
- LVDS SERDES Transmitter / Receiver (72 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (3 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (80 pages)
- IP Compiler for PCI Express (372 pages)
- Parallel Flash Loader IP (57 pages)
- Nios II C2H Compiler (138 pages)
- RAM-Based Shift Register (26 pages)
- RAM Initializer (36 pages)
- Phase-Locked Loop Reconfiguration IP Core (51 pages)
- DCFIFO (28 pages)