Altera Stratix II EP2S180 DSP Development Board User Manual
Page 23
Altera Corporation
Core Version a.b.c variable
2–15
Stratix II EP2S180 DSP Development Board Reference Manual
Board Components & Interfaces
drives high. Conversely, the LEDs illuminate if the connected Stratix II
device pin drives high, and are not illuminated when the connected
Stratix II device pin drives low.
shows the pin-outs for the 7-segment display and LEDs.
Table 2–9. 7-Segment Display & LED Pin-Outs
Signal
Stratix II Pin
Dual 7-Segment Display
HEX_0A
C4
HEX_0B
C5
HEX_0C
B5
HEX_0D
B6
HEX_0E
D7
HEX_0F
C7
HEX_0G
B8
HEX_0DP
B9
HEX_1A
F9
HEX_1B
E9
HEX_1C
C10
HEX_1D
C11
HEX_1E
F11
HEX_1F
F12
HEX_1G
C12
HEX_1DP
B12
LEDs
pld_LED0 (board designation: D1)
B4
pld_LED1 (board designation: D2)
D5
pld_LED2 (board designation: D3)
E5
pld_LED3 (board designation: D4)
A4
pld_LED4 (board designation: D5)
A5
pld_LED5 (board designation: D6)
D6
pld_LED6 (board designation: D7)
C6
pld_LED7 (board designation: D8)
A6
- MAX 10 JTAG (15 pages)
- MAX 10 Power (21 pages)
- Unique Chip ID (12 pages)
- Remote Update IP Core (43 pages)
- Device-Specific Power Delivery Network (28 pages)
- Device-Specific Power Delivery Network (32 pages)
- Hybrid Memory Cube Controller (69 pages)
- ALTDQ_DQS IP (117 pages)
- MAX 10 Embedded Memory (71 pages)
- MAX 10 Embedded Multipliers (37 pages)
- MAX 10 Clocking and PLL (86 pages)
- MAX 10 FPGA (26 pages)
- MAX 10 FPGA (56 pages)
- USB-Blaster II (22 pages)
- GPIO (22 pages)
- LVDS SERDES (27 pages)
- User Flash Memory (33 pages)
- ALTDQ_DQS2 (100 pages)
- Avalon Tri-State Conduit Components (18 pages)
- Cyclone V Avalon-MM (166 pages)
- Cyclone III FPGA Starter Kit (36 pages)
- Cyclone V Avalon-ST (248 pages)
- Stratix V Avalon-ST (286 pages)
- Stratix V Avalon-ST (293 pages)
- DDR3 SDRAM High-Performance Controller and ALTMEMPHY IP (10 pages)
- Arria 10 Avalon-ST (275 pages)
- Avalon Verification IP Suite (224 pages)
- Avalon Verification IP Suite (178 pages)
- FFT MegaCore Function (50 pages)
- DDR2 SDRAM High-Performance Controllers and ALTMEMPHY IP (140 pages)
- Floating-Point (157 pages)
- Integer Arithmetic IP (157 pages)
- Embedded Peripherals IP (336 pages)
- JESD204B IP (158 pages)
- Low Latency Ethernet 10G MAC (109 pages)
- LVDS SERDES Transmitter / Receiver (72 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (3 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (80 pages)
- IP Compiler for PCI Express (372 pages)
- Parallel Flash Loader IP (57 pages)
- Nios II C2H Compiler (138 pages)
- RAM-Based Shift Register (26 pages)
- RAM Initializer (36 pages)
- Phase-Locked Loop Reconfiguration IP Core (51 pages)
- DCFIFO (28 pages)