Altera Nios Development Board Cyclone II Edition - Manual (Page 35)

Altera Corporation Reference Manual 2–23
May 2007 Nios Development Board Cyclone II Edition
Board Components
Figure 2–9. PROTO2 Pin Information – J15, J16 & J17
Notes to Figure 2–9 :
(1) Unregulated voltage from DC power supply.
(2) Clk from board oscillator.
(3) Clk from FPGA.
(4) Clk output from PROTO2 card to FPGA.
CompactFlash
Connector
(CON3) The CompactFlash connector header (CON3) enables hardware designs
to access a CompactFlash card. Refer to
Figure 2–10 . The following two
access modes are supported:
■ ATA (hot swappable mode)
■ IDE (IDE hard disk mode)
proto2_RESET_n 1
proto2_io0 3 proto2_io2 5 proto2_io4 7 proto2_io6 9 proto2_io8 11
proto2_io10 13 proto2_io12 15 proto2_io14 17
GND 19
proto2_io16 21 proto2_io17 23 proto2_io18 25 proto2_io19 27 proto2_io21 29 proto2_io22 31 proto2_io24 33 proto2_io25 35 proto2_io27 37 proto2_io28 39
2 GND 4 proto2_io1 6 proto2_io3 8 proto2_io5 10 proto2_io7 12 proto2_io9 14 proto2_io11 16 proto2_io13 18 proto_2io15 20 NC 22 GND 24 GND 26 GND 28 proto2_io20 30 GND 32 proto2_io23 34 NC 36 proto2_io26 38 proto2_cardsel_n 40 GND
J15
J16
(1)
V
u
nreg
1
NC 3
VCC3_3
5
VCC3_3 7
(2)
proto2_osc 9
(3)
proto2_pllc
lk 11
(4)
proto2_clk
out 13
VCC3_3 15 VCC3_3 17 VCC3_3 19
2 GND 4 GND 6 GND 8 GND 10 GND 12 GND 14 GND 16 GND 18 GND 20 GND
GND 1
proto2_io40 3 proto2_io30 5 proto2_io32 7 proto2_io34 9 proto2_io36 11 proto2_io38 13
2
VCC5
4 proto2_io29 6 proto2_io31 8 proto2_io33 10 proto2_io35 12 proto2_io37 14 proto2_io39
J17