Altera SDI Audio IP Cores - Manual (Page 3)

SDI Audio Embed Registers.......................................................................................................................5-1
SDI Audio Extract Registers.......................................................................................................................5-4
SDI Clocked Audio Input Registers..........................................................................................................5-8
SDI Clocked Audio Output Registers.......................................................................................................5-9
SDI Audio IP Design Example............................................................................6-1
Components of Design Example...............................................................................................................6-1
SDI Transmitter P0..........................................................................................................................6-2
SDI Duplex........................................................................................................................................6-2
Audio Extract....................................................................................................................................6-2
AES Input Module...........................................................................................................................6-2
AES Output Module........................................................................................................................6-2
Audio Embed P0/P1........................................................................................................................6-2
Video Pattern Generator P0/P1.....................................................................................................6-2
Audio Pattern Generator................................................................................................................6-2
Ancillary Data Insertion P0/P1......................................................................................................6-2
Transceiver Dynamic Reconfiguration Control Logic...............................................................6-3
Hardware and Software Requirements.....................................................................................................6-3
Running the Design Example.....................................................................................................................6-4
Transmit SD-SDI with Embedding of Audio Group 1...............................................................6-5
Transmit HD-SDI with Embedding of Audio Group 1 and 2...................................................6-5
Transmit 3G-SDI Level A with Embedding of Audio Group 1, 2 and 3..................................6-6
Transmit 3G-SDI Level B with Embedding of Audio Group 1, 2, 3 and 4..............................6-6
Additional Information......................................................................................7-1
Document Revision History.......................................................................................................................7-1
How to Contact Altera................................................................................................................................7-1
Altera Corporation
TOC-3 SDI Audio IP Cores User Guide