Altera SDI Audio IP Cores User Manual
Page 24
Table 4-5: SDI Audio Embed Register Interface Signals
Description
Direction
Width
Signal
Clock for the Avalon-MM register interface.
Input
[0:0]
reg_clk
Reset for the Avalon-MM register interface.
Input
[0:0]
reg_reset
Reset for the Avalon-MM register interface.
Input
[5:0]
reg_base_addr
Transfer size in bytes.
Input
[5:0]
reg_burst_count
Wait request.
Output
[0:0]
reg_waitrequest
Write request.
Input
[7:0]
reg_write
Data to be written to target.
Input
[0:0]
reg_writedata
Read request.
Input
[0:0]
reg_read
Requested read data valid after read latency.
Output
[0:0]
reg_readdatavalid
Data read from target.
Output
[7:0]
reg_readdata
This table lists the direct control interface signals. These signals are exposed as ports if you turn off the
Include Avalon-MM Control Interface parameter.
Table 4-6: SDI Audio Embed Direct Control Interface Signals
Description
Direction
Width
Signal
Clock for the direct control interface.
Input
[0:0]
reg_clk
Assert this 8-bit signal to enable the audio channels. Each bit
controls one audio channel.
Input
[7:0]
audio_control
This signal does the same function as the extended control register.
Input
[7:0]
extended_control
This signal does the same function as the video status register.
Output
[7:0]
video_status
This signal does the same function as the SD EDP control register.
Output
[7:0]
sd_edp_control
This signal does the same function as the audio status register.
Output
[7:0]
audio_status
This signal does the same function as the channel status control
register.
Input
[15:0]
cs_control
This signal does the same function as the strip control register.
Input
[7:0]
strip_control
This signal does the same function as the strip status register.
Output
[7:0]
strip_status
This signal does the same function as the sine channel 1 frequency
register.
Input
[7:0]
sine_freq_ch1
This signal does the same function as the sine channel 2 frequency
register.
Input
[7:0]
sine_freq_ch2
This signal does the same function as the sine channel 3 frequency
register.
Input
[7:0]
sine_freq_ch3
SDI Audio IP Interface Signals
Altera Corporation
UG-SDI-AUD
SDI Audio Embed Signals
4-4
2014.06.30