Altera HardCopy II Clock Uncertainty Calculator - Manual (Page 38)

A–6 Altera Corporation
HardCopy II Clock Uncertainty Calculator User Guide
Inter-Clock Domain with PLL
Figure A–6 shows an example of a clock-pair = CLK2 to CLK7
Figure A–6. Inter-Clock Domain with Two PLLs
Table A–6 shows input of the PLL index for Figure A–6 , with respect to
the source and destination clocks.
INBUF
CLK2
CLK7 CLK6
Source
Clock
Destination
Clock
Source
Register
Destination
Register
PLL5
PLL9
Table A–6. Location of Input PLLs
Source Clock Destination Clock
1st PLL 2nd PLL 1st PLL 2nd PLL
5 — 9 —