Altera HardCopy II Clock Uncertainty Calculator - Manual (Page 36)

A–4 Altera Corporation
HardCopy II Clock Uncertainty Calculator User Guide
Inter-Clock Domain with PLL
Inter-Clock
Domain with
PLL This section provides clock transfer examples for an inter-clock domain
with a PLL.
Figure A–4 shows an example of a clock-pair = CLK3 to CLK5
Figure A–4. Inter-Clock Domain with a PLL on the Destination Clock
Table A–4 shows input of the PLL index for Figure A–4 , with respect to
the source and destination clocks.
INBUF
CLK3
CLK5
Source
Clock
Destination
Clock
Source
Register
Destination
Register
PLL7
Table A–4. Location of Input PLLs
Source Clock Destination Clock
1st PLL 2nd PLL 1st PLL 2nd PLL
0 — 7 —