Altera HardCopy II Clock Uncertainty Calculator - Manual (Page 34)

A–2 Altera Corporation
HardCopy II Clock Uncertainty Calculator User Guide
Intra-Clock Domain with PLL
Figure A–2 shows an example of a clock-pair = CLK5 to CLK6
Figure A–2. Intra-Clock Domain with Two PLL Outputs
Table A–2 shows input of the PLL index for Figure A–2 , with respect to
the source and destination clocks.
INBUF
PLL11
CLK5
CLK6
Source
Clock
Destination
Clock
Source
Register
Destination
Register
Table A–2. Location of Input PLLs
Source Clock Destination Clock
1st PLL 2nd PLL 1st PLL 2nd PLL
11 — 11 —