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Appendix a. clock transfer examples, Intra-clock domain with pll, Appendix a, clock transfer examples – Altera HardCopy II Clock Uncertainty Calculator User Manual

Page 33: Fer to, Chapter a, clock transfer examples, Appendix a

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A–1

Appendix A. Clock Transfer

Examples

This appendix provides clock transfer examples for the HardCopy

®

II

Clock Uncertainty Calculator.

Intra-Clock
Domain with
PLL

This section provides clock transfer examples for an intra-clock domain
with at least one PLL.

Figure A–1

shows an example of a clock-pair = CLK11 to CLK11

Figure A–1. Intra-Clock Domain with a Shared PLL Output

Table A–1

shows input of the PLL index for

Figure A–1

, with respect to

the source and destination clocks.

INBUF

PLL9

CLK11

CLK11

Source

Clock

Destination

Clock

Source
Register

Destination
Register

Table A–1. Location of Input PLLs

Source Clock

Destination Clock

1st PLL

2nd PLL

1st PLL

2nd PLL

9

9