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Compaq 21264 User Manual

Page 353

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Alpha 21264/EV67 Hardware Reference Manual

Index–9

PALcode

conditional branches in

,

D–14

described

,

6–1

entries points for

,

6–12

exception entry points

,

6–13

guidelines for

,

D–1

HW_LD instruction

,

6–3

HW_MFPR instruction

,

6–6

HW_MTPR instruction

,

6–6

HW_RET instruction

,

6–5

HW_ST instruction

,

6–4

required function codes

,

6–3

reserved opcodes for

,

6–3

restrictions for

,

D–1

PALmode environment

,

6–2

PALshadow registers

,

6–11

PCTR_CTL performance counter control counter

register

updating

,

D–17

PCTR_CTL performance counter control register

,

5–23

at power-on reset state

,

7–15

updating

,

D–18

PCTX Ibox process context register

,

5–21

after fault reset

,

7–8

after warm reset

,

7–11

at power-on reset state

,

7–15

through sleep mode

,

7–10

Phase-lock loop. See PLL

Physical address considerations

,

4–4

Pipeline

abort delay

,

2–16

Dcache access

,

2–16

Ebox execution

,

2–16

Ebox slotting

,

2–18

Fbox execution

,

2–16

instruction fetch

,

2–14

instruction group definitions

,

2–17

instruction issue rules

,

2–16

instruction latencies

,

2–20

instruction retire rules

,

2–21

instruction slot

,

2–14

issue queue

,

2–15

organization

,

2–13

register maps

,

2–15

register reads

,

2–16

PLL

description

,

7–19

output clocks

,

7–19

ramp up

,

7–6

PLL_IDD, values for

,

9–3

PLL_VDD signal pin

,

3–5

PLL_VDD, values for

,

9–3

PllBypass_H signal pin

,

3–5

PMPC ProfileMe register

,

5–8

Ports

IEEE 1149.1

,

11–3

serial terminal

,

11–2

SROM load

,

11–2

Power

maximum

,

9–1

sleep defined

,

9–3

Power supply sequencing

,

9–5

Power-on

flow signals and constraints

,

7–7

reset flow

,

7–1

self-test and initialization

,

11–5

timing sequence

,

7–3

PRB_TAG_ONLY Cbox CSR

,

4–28

defined

,

5–34

Privileged architecture library code

See PALcode

Probe commands, system

,

4–26

,

4–40

Probe queue

,

2–11

PROBE_BC_ERR error status in C_STAT

,

5–41

ProbeResponse, 21264/EV67 command

,

4–21

,

4–24

,

4–39

ProfileMe mode

,

6–20

Push-pull output clock driver. See O_PP_CLK

Push-pull output driver. See O_PP

R

R31

load instructions with

,

2–23

retire instructions with

,

2–22

speculative loads to

,

2–25

RAMP1 reset machine state

,

7–17

RAMP2 reset machine state

,

7–18

Ranges and extents convention

,

xxi

RdBlk, 21264/EV67 command

,

4–39

RdBlkI, 21264/EV67 command

,

4–39

RdBlkMod, 21264/EV67 command

,

4–39

RdBlkModSpec, 21264/EV67 command

,

4–39

RdBlkModVic, 21264/EV67 command

,

4–39

RdBlkSpec, 21264/EV67 command

,

4–39

RdBlkSpecI, 21264/EV67 command

,

4–39

RdBlkVic, 21264/EV67 command

,

4–39

RdBlkVicI, 21264/EV67 command

,

4–39

RdBytes, 21264/EV67 command

,

4–39

RdLWs, 21264/EV67 command

,

4–39

RdQWs, 21264/EV67 command

,

4–39

RDVIC_ACK_INHIBIT Cbox CSR

,

4–25

,

4–26

defined

,

5–34