beautypg.com

4 pin descriptions, 1 bcadd_h[23:4, Pin descriptions – Compaq 21264 User Manual

Page 139: Bcadd_h[23:4

background image

Alpha 21264/EV67 Hardware Reference Manual

Cache and External Interfaces

4–51

Bcache Port

The Relationship Between Write-to-Read — BC_WR_RD_BUBBLES and wr_rd

The following formulas calculate the relationship between the Cbox CSR
BC_WR_RD_BUBBLES and wr_rd:

wr_rd = (BC_WR_RD_BUBBLES – 1) * bcfrm

or

BC_WR_RD_BUBBLES = ((wr_rd + bcfrm – 1) / bcfrm) + 1

There is never a need to use a value of 0 or 1 for BC_WR_RD_BUBBLES.

If

wr_rd = 4*ratio

, then value 3 would be the minimum

BC_WR_RD_BUBBLES value when

bcfrm = 2*ratio

, and value 5 would be the

minimum BC_WR_RD_BUBBLES value when

bcfrm = ratio

.

There is a special case for

ratio = 2.0

in single-data mode. In this case, the for-

mula is:

wr_rd = (BC_WR_RD_BUBBLES – 2) * bcfrm

The Relationship Between Read-to-Write — BC_RD_WR_BUBBLES and rd_wr

Use the following formula to calculate the value for the Cbox CSR
BC_RD_WR_BUBBLES that produces the minimum rd_wr restriction:

BC_RD_WR_BUBBLES = rd_wr – 6

Note that a value for BC_RD_WR_BUBBLES of zero really means 64 GCLK cycles.
In that case, amend the formula. For example, it is impossible to have

rd_wr = 6

in

the 1.5x dual-data rate mode case.

4.8.4 Pin Descriptions

This section describes the characteristics of the Bcache interface pins.

4.8.4.1 BcAdd_H[23:4]

The BcAdd_H[23:4] pins are high drive outputs that provides the index for the Bcache.
The 21264/EV67 supports Bcache sizes of 1MB, 2MB, 4MB, 8MB, and 16MB. Table
4–42 l
ists the values to be programmed into Cbox CSRs BC_ENABLE[0] and
BC_SIZE[3:0] to support each size of the Bcache.

Table 4–42 Programming the Bcache to Support Each Size of the Bcache

BC_ENABLE[0]

BC_SIZE[3:0]

Bcache Size

1

0000

1MB

1

0001

2MB

1

0011

4MB

1

0111

8MB

1

1111

16MB