Compaq 21264 - Manual (Page 146)

5–4 Internal Processor Registers Alpha 21264/EV67 Hardware Reference Manual
Ebox IPRs
Table 5–2 describes the CC_CTL register fields.
5.1.3 Virtual Address Register – VA
The virtual address register (VA) is a read-only register. When a DTB miss or fault
occurs, the associated effective virtual address is written into the VA register. VA is not
written when a LD_VPTE gets a DTB miss or Dstream fault. Figure 5–3 shows the vir-
tual address register.
Figure 5–3 Virtual Address Register
5.1.4 Virtual Address Control Register – VA_CTL
The virtual address control register (VA_CTL) is a write-only register that controls the
way in which the faulting virtual address stored in the VA register is formatted when it
is read by way of the VA_FORM register. It also contains control bits that affect the
behavior of the memory pipe virtual address sign extension checkers and the behavior
of the Ebox extract, insert, and mask instructions. Figure 5–4 shows the virtual address
control register.
Figure 5–4 Virtual Address Control Register
Table 5–2 Cycle Counter Control Register Fields Description
Name Extent Type Description
Reserved [63:33] — —
CC_ENA [32] WO Counter Enable.
When set, this bit allows the cycle counter to increment.
COUNTER[31:4] [31:4] WO CC[31:4] may be written by way of this field. Write transactions
to CC_CTL result in CC[3:0] being cleared.
Reserved [3:0] — —
VA[63:0]
63 0
LK99-0010A
63 29 3 2 1 30 0
VPTB[63:30]
VA_FORM_32
VA_48
B_ENDIAN
LK99-0014A