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4 cbox csrs and iprs, Cbox csrs and iprs, Dcache status register – Compaq 21264 User Manual

Page 174: Dcache status register fields description, 4 cbox csrs and iprs

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5–32

Internal Processor Registers

Alpha 21264/EV67 Hardware Reference Manual

Cbox CSRs and IPRs

Figure 5–34 Dcache Status Register

Table 5–21 describes the Dcache status register fields.

5.4 Cbox CSRs and IPRs

This section describes the Cbox CSRs and IPRs.

The Cbox configuration registers are split into three shift register chains:

The hardware allocates 367 bits for the WRITE_ONCE chain, of which the 21264/
EV67 uses 304 bits. During hardware reset (after BiST), 367 bits are always
shifted into the WRITE_ONCE chain from the SROM, MSB first, so that the
unused bits are shifted out the end of the WRITE_ONCE chain.

A 36-bit WRITE_MANY chain that is loaded using MTPR instructions to the Cbox
data register. Six bits of information are shifted into the WRITE_MANY chain dur-
ing each write transaction to the Cbox data register.

A 60-bit Cbox ERROR_REG chain that is read by using MFFR instructions from
the Cbox data register in combination with MTPR instructions to the Cbox shift
register. Each write transaction to the Cbox shift register destructively shifts six bits
of information out of the Cbox error register.

Table 5–21 Dcache Status Register Fields Description

Name

Extent

Type

Description

Reserved

[63:5]

SEO

[4]

W1C

Second error occurred. When set, this bit indicates that a second
Dcache store ECC error occurred within 6 cycles of the previous
Dcache store ECC error.

ECC_ERR_LD

[3]

W1C

ECC error on load. When set, this bit indicates that a single-bit ECC
error occurred while processing a load from the Dcache or any fill.

ECC_ERR_ST

[2]

W1C

ECC error on store. When set, this bit indicates that an ECC error
occurred while processing a store.

TPERR_P1

[1]

W1C

Tag parity error — pipe 1. When set, this bit indicates that a Dcache
tag probe from pipe 1 resulted in a tag parity error. The error is uncor-
rectable and results in a machine check.

TPERR_P0

[0]

W1C

Tag parity error — pipe 0. When set, this bit indicates that a Dcache
tag probe from pipe 0 resulted in a tag parity error. The error is uncor-
rectable and results in a machine check.

63

5 4 3 2 1 0

SEO

ECC_ERR_LD

ECC_ERR_ST

TPERR_P1

TPERR_P0

LK99-0042A