beautypg.com
6
UG034, July 1, 2014
List of Figures
Figure 1: ACE Development Environment............................................................................................... 12
Figure 2: ACX-BRD-HD1000-100G Development Board Picture .......................................................... 13
Figure 3: Standalone Use Mode ................................................................................................................ 14
Figure 4: In-System Use Mode ................................................................................................................. 15
Figure 5: Software Development Environment ........................................................................................ 18
Figure 6: Standalone Board Connections ................................................................................................. 19
Figure 7: In-System Board Connections ................................................................................................... 20
Figure 8: ACX-BRD-HD1000-100G Board Configuration Modes ......................................................... 22
Figure 9: HD1000 FPGA Interfaces ......................................................................................................... 26
Figure 10: ACX-BRD-HD1000-100G Development Board Interface Overview .................................... 27
Figure 11: ACX-BRD-HD1000-100G Development Board Interface Locations .................................... 28
Figure 12: ACX-BRD-HD1000-100G JTAG Daisy Chain ...................................................................... 39
Figure 13: ACE GUI for the Bitporter Pod ............................................................................................... 49
