Achronix Speedster22i HD1000 Development Kit User Guide - Manual (Page 23)

UG034, July 1, 2014 23
HD1000 (U33) Connection
BYPASS_CLR_MEM J18 SW8 HDR_BYPASS_CLR_MEM 1
CONFIG_SCRUBBING_ENABLE K19 HDR_CFG_SCR_ENABLE 2
CONFIG_SCRUB_SINGLE_ERR J20 TP97
CONFIG_SCRUB_MULTIPLE_ERR M20 TP99
CORE_TESTIN1 K20 TP98
TEMP_DIODE_N R38 U37 GND 2
TEMP_DIODE_P R39 DXP 3
CONFIG_RSTN J14 U96 Y 4
CONFIG_STATUS M16 Q8
See Note
1
CONFIG_DONE J16 Q9 1
TDI K17 J19 1
TDO K16 4
TMS J19 J12 2
TRSTN L16 J11 A_TRST_N 1
TCK J13 A_TCK 9
SDI L13 U29 F_CFG_DQ0 10
SD3 L14 F_CFG_DQ1 9
SD2 M13 F_CFG_DQ2 7
SD1 M14 F_CFG_DQ3 6
SD0 N14 F_CFG_DQ4 4
HOLDN K13 F_CFG_DQ5 12
CSN3 N19 U23 F_CFG_DQ6 6
CSN2 N17 F_CFG_DQ7 4
CSN1 J15
CSN0 N20 U23 F_CFG_CSN 7
CPU_CLK K18 9
SCK N13 UA2 3
START_CONFIG_STARTUP K14 SW8 HDR_CONFIG_STARTUP
EFUSE_PROG T14 TP100
EDM B9 TP103
READ_STATE_ERR N16 Q2 See Note 1
Note: Q8, Q9, and Q2 drive status indicator LEDs: D1, D2, and D6. CSN1 is unused.
Table 3 shows the configuration pin descriptions and their functions for HD1000
configuration.
Table 3: HD1000 Pins and their Descriptions for Configuration
Pin Name on HD
1000 (U33)
x1 Boot from Flash
(Serial Mode) - EFC
CPU Mode
SDI DQ0 Serial data output to FLASH memory
SDO3 DQ1 Input of config data from FLASH
SDO2 DQ2 Input of config data from FLASH
SDO1 DQ3 Input of config data from FLASH
SDO0 DQ4 Input of config data from FLASH
HOLDN DQ5 Hold output to FLASH
CSN3 DQ6 Active-low chip select
CSN2 DQ7 Active-low chip select
CSN1 UNUSED Active-low chip select
CSN0 Active-low chip select