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Rainbow Electronics AT76C551 User Manual

Page 63

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63

AT76C551

1612D–08/01

US_RHR: Receive Holding Register

addr: 700000 hex

R

8 bits

• Bits 7..0 – US_RHR[7:0]

Received data

Note:

Default Value: 00 hex

US_THR: Transmit Holding Register

addr: 700000 hex

W

8 bits

• Bits 7..0 – US_THR[7:0]

Transmit data

Note:

Default Value: 00 hex

US_IER: Interrupt Enable Register

addr: 700004 hex

R/W

8 bits

• Bit 7 – TXEI: Transmitter Empty Interrupt

When set the interrupt is enabled. When both the Transmit Holding Register US_THR and the
Transmit Shift Register are empty and the I bit in Status Register SREG of the MCU is set, an
interrupt will occur.

• Bit 6 – RXTOI: Receive Time-out Interrupt

When set, the time-out interrupt is enabled. When the time-out period for the receiver has
passed and the I bit in the Status Register SREG of the MCU is set, an interrupt will occur.

• Bit 5 – PEI: Parity Error Interrupt

This bit when set enables the Parity Error interrupt. If the Parity Error bit of Control Status Reg-
ister US_CSR is set, an interrupt will occur.

• Bit 4 – FEI: Framing Error Interrupt

This bit when set enables the Framing Error interrupt. If the Parity Error bit of Control Status
Register US_CSR is set, an interrupt will occur.

• Bit 3 – OEI: Overrun Error Interrupt

This bit when set enables the Overrun Error interrupt. If the Parity Error bit of Control Status
Register US_CSR is set, an interrupt will occur.

• Bit 2 – RBRI: Receive Break Interrupt

When set enables receive break interrupt. If a receive break condition is detected and both
this and the I bit of SREG of the MCU is set, an interrupt will occur.

• Bit 1 – THRI: Transmit Register Interrupt

When set indicates that the transmit ready interrupt is enabled. When the contents of the
Transmit Holding Register are transferred to the Transmit Shift Register and both this and the
I bit of SREG of the MCU are set, an interrupt occurs.

• Bit 0 – RHRI: Receive Holding Register Interrupt

When set, indicates that the Receive Holding Register interrupt is enabled. If the data loaded
in the Receive Holding Register (US_RHR) are not read or the trigger level has been reached,
an interrupt occurs, if this bit and the I bit of SREG of the MCU are set.

Note:

Default Value: 00 hex – The Modem Control Interrupts are controlled only from the US_MCC
register.