Rainbow Electronics AT76C551 - Manual (Page 26)

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AT76C551
1612D–08/01
SIR3 – AMBA AHSR: Address High Select Register
PCMCIA addr: 0003 hex R/W 8 bits
• Bit 7 – Reserved
• Bits 6..0 – AD[14:8]
This register is used by the host in conjunction with SIR1, SIR2, SIR4 and SIR5 in order to
access AMBA bus resources (Flash and internal or external SRAM) through the PCMCIA
interface unit. Each time SIR4 is accessed, the AMBA AHSR drives AMBA address lines
14..8.
Note: Default Value: 00 he
SIR4 – AMBA I/O DLR: Data Low Register
PCMCIA addr: 0004 hex R/W 8 bits
• Bits 7..0 – D[7:0]
This register is used by the host in conjunction with SIR1, SIR2, SIR3 and SIR5 in order to
access AMBA bus resources (Flash and internal or external SRAM) through the PCMCIA
interface unit.
Note: Default Value: 00 hex
Writing the AMBA DLR initiates an AMBA write cycle. AMBA address lines are driven by SIR1,
SIR2 and SIR3 while AMBA data lines are driven by SIR4 and SIR5. As a result an AMBA
resource is written.
Reading the AMBA DLR initiates an AMBA read cycle. AMBA address lines are driven by
SIR1, SIR2 and SIR3 while AMBA data lines are reflected to SIR4 and SIR5. As a result, an
AMBA resource is read.
SIR5 – AMBA I/O DHR: Data High Register
PCMCIA addr: 0005 hex R/W 8 bits
• Bits 7..0 – D[15:8]
This register is used by the host in conjunction with SIR1, SIR2, SIR3 and SIR4 in order to
access 16-bit AMBA bus resources (Flash and internal or external SRAM) through the PCM-
CIA interface unit.
Note: Default Value: 00 hex
Writing/reading SIR4 causes an AMBA write/read cycle. During this cycle the SIR4 is con-
nected to AMBA data lines 7..0 while the AMBA Data High Register (DHR) is connected to
AMBA data lines 15..8.
In order to write a 16-bit AMBA resource, the first most significant 8-bit write the AMBA DHR
and second least significant 8-bit write the AMBA DLR. Writing to the AMBA DLR initiates the
AMBA write cycle.
In order to read a 16-bit AMBA resource, the least stanching 8 bits must be read first for AMBA
DLR and secondly the most significant 8 bits are read for AMBA DHR. Reading the AMBA
DLR initiates the AMBA read cycle.
Note: Writing/reading only the AMBA DHR without writing/reading the AMBA DLR does not cause an
AMBA write/read cycle.