Rainbow Electronics AT76C551 - Manual (Page 55)

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AT76C551
1612D–08/01
• Bits 15..9 – Reserved
• Bits 8..0 – UTDL[8:0]: USB Transmit DMA Length
Note: Default: 00h
The ARM programs this register with the number of bytes to be transferred during the next
DMA.
USB_TDMA_LENR: Transmit DMA Packet Length Transferred
addr 5000048h R 8 bits
• Bits 7..0 UTDL[7:0]: Transmit DMA Transferred Length
Note: Default: 00h
After the end of a DMA, the contents of this register reflect the number of bytes that have been
transferred from main system memory to the transmit FIFO.
USB_TDMA_EN: Transmit DMA Enable
addr 500004Ch R/W 8 bits
Bits 7..2 – Reserved
• Bit 1 – Reserved
• Bit 0 – TDMAEN
Activates transmit DMA (DMA for an IN endpoint)
Note: Default: 00h
This bit is reset after the completion of the DMA.
FRM_NUM_H: Frame Number High Register
addr 50003F4h W 8 bits
Bits 7..3 – Reserved
• Bits 2..0 – FCH[10:8]
This is the upper 3 bits of the 11-bit frame number of SOF packet.
Note: Default: 00h
FRM_NUM_L: Frame Number Low Register
addr 50003F0h W 8 bits
Bits 7..3 – Reserved
• Bits 2..0 FCL[7:0]
This is the lower 8 bits of the 11-bit frame number of SOF packet.
Note: Default: 00h
GLB_STATE: Global State Register
addr 50003ECh 8 bits
• Bits 7..4 – Reserved
• Bit 3 W – RSMINPR
Set by the hardware when a Resume is send in the USB bus during Remote Wake-up feature
(13 ms).