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6 interrupt related registers, 1 sac, Interrupt related registers -44 2.6.1 – Intel 460GX User Manual

Page 64: Sac -44

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Register Descriptions

2-44

Intel® 460GX Chipset Software Developer’s Manual

2.5.5.2

PCI_WXB_PMC1: PCI Performance Monitor Configuration Register

Address Offset:

E8h – EBh

Size:

32bits

Default Value:

00000000h

Attribute:

Read/Write

This register controls the PCI performance monitors. There are two performance monitors for each
PCI bus. This register defines the events to be monitored and when monitoring starts and stops.
The selected event can be qualified by data transferred, and issuing agent.

Bits

Description

31:0

See PCI_WXB_PMC0 definitions.

2.6

Interrupt Related Registers

2.6.1

SAC

2.6.1.1

XTPRS: External Task Priority Registers

Bus CBN, Device Number: 00h

Function:

0

Address Offset:

C0-C7h

Size:

64 bits

Default Value:

80h

Attribute:

Read Only

Sticky:

No

Locked:

No

The XTPRS are used to support redirectable interrupts. These registers are made observable to
software primarily for test and debug purposes. These registers will be updated by XTPR Update
Special Cycle on the system bus. The second cycle of the XTPR Update Special Cycle’s address
determines the value to load into the register. Ab[27:24]# is the 4 bit XTPR value. Ab[23:20]#
determines which register to update. Since the high priority agent reserves the uppermost agent ID
bit, only Ab[22:20]# are used. These 3 bits decode to one of the 8 registers. Ab[31] is the enable bit
for the register.

All registers default to 1000_0000b, which is the disabled state.

Each register is defined as:
Bit 7 - enable (1=disable, 0=enable)
Bits 6:4 - reserved (0)
Bits 3:0 - value of XTPR

Bits

Description

63:56

XTPR 7
These bits represent the external task priority for symmetric agent ID 07h.

55:48

XTPR 6
These bits represent the external task priority for symmetric agent ID 06h.

47:40

XTPR 5
These bits represent the external task priority for symmetric agent ID 05h.

39:32

XTPR 4
These bits represent the external task priority for symmetric agent ID 04h.

31:24

XTPR 3
These bits represent the external task priority for symmetric agent ID 03h.

23:16

XTPR 2
These bits represent the external task priority for symmetric agent ID 02h.