Intel 460GX User Manual
Page 32
Register Descriptions
2-12
Intel® 460GX Chipset Software Developer’s Manual
2.4.2.4
DED0_D_FERR: Data on First Memory Card B DED
Bus CBN, Device Number:
04h
Address Offset:
50-57h
Size:
64 bits
Default Value:
0
Attribute:
Read Only, New Value Latched
anytime appropriate FERR register
bit is set
This register records and latches the data corresponding to the first DED detected by memory
interface 0 in the SDC.
Bits
Description
63:0
DE - System Data of Error.
2.4.2.5
DED0_ECC_FERR: ECC on First Memory Card B DED
Bus CBN, Device Number:
04h
Address Offset:
58h
Size:
8 bits
Default Value:
00h
Attribute:
Read Only, New Value Latched
anytime appropriate FERR register
bit is set
This register records and latches the ECC checkbits corresponding to the first SEC detected by
memory interface 0 in the SDC
Bits
Description
7:0
ECC - ECC of Error.
2.4.2.6
DED0_TXINFO_FERR: TXINFO on First Memory Card B DED
Bus CBN, Device Number:
04h
Address Offset:
59-5Ah
Size:
16 bits
Default Value:
00h
Attribute:
Read Only, New Value Latched
anytime appropriate FERR register
bit is set
This register records the ITID and failing chunk corresponding to the first DED detected by
memory interface 0 in the SDC.
Bits
Description
15:9
reserved(0)
8:6
DC - Data Chunk of ITID.
5:0
ITID - ITID of error.
2.4.2.7
SEC1_D_FERR: Data on First Memory Card A SEC
Bus CBN, Device Number:
04h
Address Offset:
60-67h
Size:
64 bits
Default Value:
0
Attribute:
Read Only, New Value Latched
anytime appropriate FERR register
bit is set