BECKHOFF EtherCAT IP Core for Xilinx FPGAs v3.00k - Manual (Page 16)

Overview
III-4 Slave Controller – IP Core for Xilinx FPGAs
1.4 Target FPGAs
The EtherCAT IP Core for Xilinx ® FPGAs is targeted at these FPGA families:

Spartan ® -6

Artix ® -7, Artix-7 Low Voltage

Kintex TM -7, Kintex-7 Low Voltage

Virtex ® -6

Virtex ® -7

Kintex ® UltraScale TM

Virtex ® UltraScale TM

Zynq ® -7000
The EtherCAT IP Core is designed to support a wide range of FPGAs without modifications, because
it does not instantiate dedicated FPGA resources, or rely on device specific features. Thus, the IP
Core is easily portable to new FPGA families (e.g. Zynq UltraScale MPSoC).
The complexity of the IP Core is highly configurable, so its demands for logic resources, memory
blocks, and FPGA speed cover a wide range. Thus, it is not possible to run any IP Core configuration
on any target FPGA with any speed grade. I.e., there are IP Core configurations requiring a faster
speed grade, or a larger FPGA, or even a more powerful FPGA family.
It is necessary to run through the whole synthesis process – including timing checks –, to evaluate if
the selected FPGA is suitable for a certain IP Core configuration before making the decision for the
FPGA. Please consider a security margin for the logic resources to allow for minor enhancements and
bug fixes of the IP Core and the user logic.
1.5 Designflow requirements
For synthesis of the EtherCAT IP Core for Xilinx FPGAs, at least one of the following Xilinx design
tools is needed:

Xilinx Integrated Software Environment ISE 14.3 - 14.7

Xilinx Platform Studio 14.3 - 14.7

Xilinx PlanAhead 14.3 - 14.7

Xilinx Vivado 2013.1 - 2013.4, 2014.1 - 2014.3

Xilinx Vivado 2014.4 (Refer to the Hardware Data Sheet Section III Addendum for issues with the
Vivado example design)
Higher design tool versions are probably supported. Installation of the latest patches is recommended.
A free version (“WebPack”) is available from Xilinx (
http://www.xilinx.com ).
Optionally for using the EtherCAT IP Core with embedded processor designs, you will need

Xilinx SDK

Xilinx Vivado SDK