Artesyn MVME6100 Single Board Computer Installation and Use (June 2014) - Manual (Page 72)

Functional Description
MVME6100 Single Board Computer Installation and Use (6806800D58H) 72
4.6.13 PCI Bus Arbitration
PCI arbitration is performed by the MV64360 system controller. The MV64360 integrates two
PCI arbiters, one for each PCI interface (PCI bus 0/1). Each arbiter can handle up to six external
agents plus one internal agent (PCI bus 0/1 master). The internal PCI arbiter REQ#/GNT# signals
are multiplexed on the MV64360 MPP pins. The internal PCI arbiter is disabled by default (the
MPP pins function as general-purpose inputs). Software configures the MPP pins to function as
request/grant pairs for the internal PCI arbiter. The arbitration pairs for the MVME6100 are
assigned to the MPP pins as shown in the MVME6100 Programmer’s Guide.
4.7 VMEbus Interface
The VMEbus interface is provided by the Tsi148 ASIC. Refer to the Tsi148 User’s Manual available
from Tundra Semiconductor for additional information as listed in
Appendix C, Related
Documentation . 2eSST operations are not supported on 3-row backplanes. You must use
VME64x (VITA 1.5) compatible backplanes, such as 5-row backplanes, to achieve maximum
VMEbus performance.
4.8 PMCspan Interface
The MVME6100 provides a PCI expansion connector to add more PMC interfaces than the two
on the MVME6100 board. The PMCspan interface is provided through the PCI6520 PCIx/PCIx
bridge.
4.9 Flash Memory
The MVME6100 contains two banks of flash memory accessed via the device controller bus
contained within the MV64360 device. Both banks are soldered on board and have different
write-protection schemes.