Artesyn MVME6100 Single Board Computer Installation and Use (June 2014) - Manual (Page 26)

Hardware Preparation and Installation
MVME6100 Single Board Computer Installation and Use (6806800D58H) 26
(or to exclude incompatible PMC cards). In the default position in the middle of the four PMC
site connectors, the signaling voltage for the PMC sites is set to 5.0V. When the keying pins are
moved to the alternate location in front of their set of four PMC connectors, the signaling
voltage for the PMC sites is set for 3.3V.
A PMC card that requires 5.0V VIO only signaling has a hole in the middle of its four PMC
connectors, such that it fits over the MVME6100's keying pin in that location. With the
MVME6100's keying pin in the 3.3V location, that PMC card would be physically unable to be
mounted. Similarly, a PMC card that requires 3.3V VIO-only signaling has its keying hole
located just to the front of its four PMC connectors, and will only fit to the MVME6100 when
the keying pin is located there. However, most modern PMC cards are universal with respect to
the VIO signaling voltage they support, and have keying holes in both locations; that is, they
will fit on the MVME6100's PMC site with the key in either location. For these PMC cards, it is
recommended setting the MVME6100's keying pins to the 3.3V VIO signaling position, to
allow the maximum PCIbus clock speed.
1.5.4 Front/Rear Ethernet and Transition Module Options Header
(J30)
A 40-pin planar header allows for selecting P2 options. Jumpers installed across Row A pins 3-
10 and Row B pins 3-10 enable front Ethernet access. Jumpers installed across Row B pins 3-10
and Row C pins 3-10 enable P2 (rear) Gigabit Ethernet. Only when front Ethernet is enabled can
the jumpers be installed across Row C and Row D on pins 1-10 to enable P2 (rear) PMC I/O. Note
that all jumpers must be installed across the same two rows (all between Row A and Row B
and/or Row C and Row D, or all between Row B and Row C).
The keying pins for both PMC sites must be set to the same signaling voltage. Note also that
the signaling voltage has an effect on the PCI bus clock speed for the PMC sites. At 5.0V
signaling, the PCI bus clock speed is limited to 33 MHz, whereas 3.3V signaling voltage
supports conventional PCIbus clock speeds of 33 or 66 MHz, and PCIx clock speeds of 66 or
100MHz.