Altera Stratix GX Transceiver - Manual (Page 252)

9–26 Altera Corporation
Stratix GX Transceiver User Guide January 2005
Recommended Resets
begin
waitstate_timer <= waitstate_timer;
if(receive_digitalreset)
rxdigitalreset_rx_cruclk <= 1'b1;
else
rxdigitalreset_rx_cruclk <= 1'b0;
end
else
begin
waitstate_timer <= waitstate_timer - 1'b1;
rxdigitalreset_rx_cruclk <= 1'b1;
end
end
else
begin
rxdigitalreset_rx_cruclk <= 1'b1;
waitstate_timer <=
WAITSTATE_TIMER_VALUE;
end
end
end
/*synchronizing the rxdigitalreset to recovered clock domain
If rxdigitalreset is used for Receive GXB, then this
synchronization is needed because
internally the rxdigitalreset is only synchronized to recovered
clock (rx_clkout).
To reset the rx_coreclk domain logic in PLD fabric following reset
is useful
*/
always @(posedge rx_coreclk or posedge async_reset)
if(async_reset)
begin
rxdigitalreset_rx_coreclk_Q <= 1'b1;
rxdigitalreset <= 1'b1;
end
else
begin
if(receive_digitalreset)
begin
rxdigitalreset_rx_coreclk_Q <= 1'b1;
rxdigitalreset <= 1'b1;
end
else
begin
rxdigitalreset_rx_coreclk_Q <=
rxdigitalreset_rx_cruclk;
rxdigitalreset <=
rxdigitalreset_rx_coreclk_Q;