Achronix Speedster22i 10G/40G/100G Ethernet - Manual (Page 75)

UG029, September 6, 2013 75
the bit in the device ability advertisement register is not relevant
to the operation of the autonegotiation function. The bit is
typically set in the received partner ability register upon
successful completion of autonegotiation.
15 NP RW Next page capa ble. Set to ‘1’ to indicate next page capability.
Table 40 – (SGMII PCS) DEVICE/PARTNER_ABILITY Register Description -
SGMII Mode
Bit(s) Name Type Description
0 to 9 Reserved RW reserved. Bit 0 should be set to 1.
10 to
11
Copper
Speed
RW
Read only bits, used to by the SGMII PHY to advertise the
Copper interface speed (Bit 11:10):
00: Copper Interface Speed is 10Mbps
01: Copper Interface Speed is 100Mbps
10: Copper Interface Speed is Gigabit
11: Reserved
12
Copper
Duplex
Status
RW
Read only bit, used by the SGMII PHY to advertise the Link
Partner Copper duplex capability:
0: Copper Interface resolved to Half-Duplex
1: Copper Interface resolved to Full-Duplex
13 Reserved RW -
14 ACK RO
Acknowledgement bit used during autonegotiation. Setting
of the bit in the device ability advertisement register is not
relevant to the operation of the autonegotiation function. The
bit is typically set in the received partner ability register upon
successful completion of autonegotiation.
15
Copper
Link Status
RW
Read only bit, used by the SGMII PHY to advertise the Link
Partner Copper status:
1: Copper interface link is up
0: Copper interface link is down
Note: Note: The device ability register (DEV_ABILITY) in SGMII mode is normally not relevant to
the PHY and can contain any value, however must never be 0. The default should be left unchanged if
not specifically required by the PHY device.
Table 41 – (SGMII PCS) AN_EXPANSION Register Description
Bit(s) Name Type Description
0
Real-time
Page
Receive
RO
Set to ‘1’ to indicate that a new page has been received.
This bit is a real-time indication of the page received
status.
1
Page
Receive
RO
(LH)
Set to ‘1’ to indicate that a new page has been received
with new partner ability available in the PCS register
PARTNER_ABILITY. The bit is set to ‘0’ (Reset value)
when the register is read.
2:15 Reserved RO -