Achronix Speedster22i 10G/40G/100G Ethernet User Manual
Page 100
100
UG029, September 6, 2013
4
22[7:0]
23[0:0]
RXEQ_FINE_RUN_
MASK
RW
1FD
Equalization calibration fine
mode variable control mask.
Each bit controls whether or not
an equalization variable will be
swept during fine mode.
0 - Do not sweep variable
1 - Sweep variable
Bit 0 - AGC low frequency gain
Bit 1 - AGC high frequency gain
Bit 2 - AGC AC Boost
Bit 3 - Pulse-shaping DFE 3dB
cut-off frequency
Bit 4 - Pulse-shaping DFE gain
Bit 5 - Discontinuity DFE N-1
tap gain
Bit 6 - Discontinuity DFE N-2
tap gain
Bit 7 - Discontinuity DFE N-3
tap gain
Bit 8 - Discontinuity DFE N-4
tap gain
4
24[7:0]
RXEQ_LOOKUP_CO
DE_EN
RW
FF
Equalization calibration lookup
table code control. When in
lookup table mode, this register
controls whether or not the
associated lookup code is
included. Lookup codes 1-7 are
predefined, lookup code 0 is
defined by *_LUP0 registers
described below.
4
2B[2:0]
RXEQ_DCGAIN_LU
P0
RW
0
Equalization calibration lookup
table code 0 - AGC high
frequency gain
4
2E[6:4]
RXEQ_LOFREQAGC
GAIN_LUP0
RW
7
Equalization calibration lookup
table code 0 - AGC low
frequency gain
4
2C[2:0]
RXEQ_DFEPSTAPG
AIN_LUP0
RW
4
Equalization calibration lookup
table code 0 - Pulse-shaping
DFE gain
4
2F[4:0]
RXEQ_HIFREQAGC
CAP_LUP0
RW
0
Equalization calibration lookup
table code 0 - AGC AC Boost
4
2C[6:3]
RXEQ_DFETAP1GAI
N_LUP0
RW
0
Equalization calibration lookup
table code 0 - Discontinuity DFE
N-1 tap gain
4
2D[3:0]
RXEQ_DFETAP2GAI
N_LUP0
RW
8
Equalization calibration lookup
table
code 0 - Discontinuity DFE N-2
tap gain
4
2D[7:4]
RXEQ_DFETAP3GAI
N_LUP0
RW
0
Equalization calibration lookup
table code 0 - Discontinuity DFE
N-3 tap gain
4
2E[3:0]
RXEQ_DFETAP4GAI
N_LUP0
RW
8
Equalization calibration lookup
table code 0 - Discontinuity DFE
N-4 tap gain
4
26[5:3]
RXEQ_DFEPSTAPF
3DB_GEN2
RW
7
PCIe Gen2 Equalization control
- Pulse-shaping DFE 3dB cut-