Rainbow Electronics DS2143Q - Manual (Page 29)

DS2143/DS2143Q
031397 29/40
TRANSMIT SIDE TIMING
15 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 FRAME# 16 1 2 3 4 5 6 14
TSYNC 1
TSYNC 2
TCLK 3
TLINK 3
NOTES:
1. TSYNC in the frame mode (TCR1.1=0).
2. TSYNC in the multiframe mode (TCR1.1=1).
3. TLINK is programmed to source only the Sa4 bit.
4. This diagram assumbes both the CAS MF and the CRC4 begin with the align frame.
LINE INTERFACE CONTROL TIMING
LI_CS
LI_SCLK
LI_SDI 1
LI_SDI 2
0 0 0 0 0 0 0 CR0 CR1 CR2 CR3 CR4 CR5 CR6 CR7
CR0 CR1 CR2 CR3 CR4 CR5 CR6 CR7 0 0 0 0 0 1 1 0
1
244 ns 244 ns 244 ns
NOTES:
1. A write to CRB1 will cause the DS2143 to output this sequence.
2. A write to CRB2 will cause the DS2143 to output this sequence.
3. Timing numbers are based on RCLK=2.048 MHz with 50% duty cycle.