Rainbow Electronics DS2143Q User Manual
Page 26

DS2143/DS2143Q
031397 26/40
RECEIVE SIDE BOUNDARY TIMING (WITH ELASTIC STORE DISABLED)
RCLK
RPOS,
RNEG
1
RSER
1
RSYNC
RCHCLK
RCHBLK
2
RLCLK
3
RLINK
LSB
Si
MSB
LSB MSB
CHANNEL 1
CHANNEL 2
LSB
MSB
CHANNEL 32
CHANNEL 1
CHANNEL 2
RLCLK
4
RLCLK
5
1
Sa4 Sa5
Sa6
Sa7 Sa8
Si
1
A
Sa4
Sa5 Sa6 Sa7
Sa8
Sa4
Sa5 Sa6 Sa7
Sa8
A
NOTES:
1. There is a 6 RCLK delay from RPOS, RNEG to RSER.
2. RCHBLK is programmed to block channel 2.
3. RLINK is programmed to output the Sa4 bits.
4. RLINK is programmed to output the Sa4 and Sa8 bits.
5. RLINK is programmed to output the Sa5 and Sa7 bits.
6. Shown is a non–align frame boundary.
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