Rainbow Electronics DS2143Q User Manual

Page 18

DS2143/DS2143Q

031397 18/40

or CRC4 level; it will continue to count if loss of sync
occurs at the CAS level.

6.0 Sa DATA LINK CONTROL AND
OPERATION

The DS2143 provides for access to the proposed E1
performance monitor data link in the Sa bit positions.
The device allows access to the Sa bits either via a set of
two internal registers (RNAF and TNAF) or via two
external pins (RLINK and TLINK).

On the receive side, the Sa bits are always reported in
the internal RNAF register (see Section 11 for more
details). All five Sa bits are always output at the RLINK
pin. See Section 13 for detailed timing. Via RCR2, the
user can control the RLCLK pin to pulse during any com-
bination of Sa bits. This allows the user to create a clock
that can be used to capture the needed Sa bits.

On the transmit side, the individual Sa bits can be either
sourced from the internal TNAF register (TCR1.6=0) or
from the external TLINK pin. Via TCR2, the DS2143
can be programmed to source any combination of the

additional bits from the TLINK pin. If the user wishes to
pass the Sa bits through the DS2143 without them being
altered, then the device should be set up to source all
five Sa bits via the TLINK pin and the TLINK pin should
be tied to the TSER pin. Please see the timing diagrams
and the transmit data flow diagram in Section 13 for
examples.

7.0 SIGNALING OPERATION

The Channel Associated Signaling (CAS) bits
embedded in the E1 stream can be extracted from the
receive stream and inserted into the transmit stream by
the DS2143. Each of the 30 channels has four signaling
bits (A/B/C/D) associated with it. The numbers in paren-
thesis () are the channel associated with a particular
signaling bit. The channel numbers have been
assigned as described in the CCITT documents. For
example, channel 1 is associated with timeslot 1 and
channel 30 is associated with timeslot 31. There is a set
of 16 registers for the receive side (RS1 to RS16) and 16
registers on the transmit side (TS1 to TS16). The
signaling registers are detailed below.

RS1 TO RS16: RECEIVE SIGNALING REGISTERS (Address=30 to 3F Hex)

(MSB)

(LSB)

A(1)

B(1)

C(1)

D(1)

A(16)

B(16)

C(16)

D(16)

A(2)

B(2)

C(2)

D(2)

A(17)

B(17)

C(17)

D(17)

A(3)

B(3)

C(3)

D(3)

A(18)

B(18)

C(18)

D(18)

A(4)

B(4)

C(4)

D(4)

A(19)

B(19)

C(19)

D(19)

A(5)

B(5)

C(5)

D(5)

A(20)

B(20)

C(20)

D(20)

A(6)

B(6)

C(6)

D(6)

A(21)

B(21)

C(21)

D(21)

A(7)

B(7)

C(7)

D(7)

A(22)

B(22)

C(22)

D(22)

A(8)

B(8)

C(8)

D(8)

A(23)

B(23)

C(23)

D(23)

A(9)

B(9)

C(9)

D(9)

A(24)

B(24)

C(24)

D(24)

A(10)

B(10)

C(10)

D(10)

A(25)

B(25)

C(25)

D(25)

A(11)

B(11)

C(11)

D(11)

A(26)

B(26)

C(26)

D(26)

A(12)

B(12)

C(12)

D(12)

A(27)

B(27)

C(27)

D(27)

A(13)

B(13)

C(13)

D(13)

A(28)

B(28)

C(28)

D(28)

A(14)

B(14)

C(14)

D(14)

A(29)

B(29)

C(29)

D(29)

A(15)

B(15)

C(15)

D(15)

A(30)

B(30)

C(30)

D(30)

RS1 (30)

RS2 (31)

RS3 (32)

RS4 (33)

RS5 (34)

RS6 (35)

RS7 (36)

RS8 (37)

RS9 (38)

RS10 (39)

RS11 (3A)

RS12 (3B)

RS13 (3C)

RS14 (3D)

RS15 (3E)

RS16 (3F)