Rainbow Electronics DS2143Q - Manual (Page 15)

DS2143/DS2143Q
031397 15/40
LOTC SR2.2 Loss of Transmit Clock. Set when the TCLK pin has not transitioned for
one channel time (or 3.9
µ
s). Will force pin 34 high if enabled via TCR2.0.
Based on RCLK.
RCMF SR2.1 Receive CRC4 Multiframe. Set on CRC4 multiframe boundaries; will con-
tinue to be set every 2 ms on an arbitrary boundary if CRC4 is disabled.
LORC SR2.0 Loss of Receive Clock. Set when the RCLK pin has not transitioned for at
least 2
µ
s (3
µ
s
±
1
µ
s).
IMR1: INTERRUPT MASK REGISTER 1 (Address=16 Hex)
(MSB) (LSB)
RSA1 RDMA RSA0 SLIP RUA1 RRA RCL RLOS
SYMBOL POSITION NAME AND DESCRIPTION
RSA1 IMR1.7 Receive Signaling All Ones.
0 = interrupt masked
1 = interrupt enabled
RDMA IMR1.6 Receive Distant MF Alarm.
0 = interrupt masked
1 = interrupt enabled
RSA0 IMR1.5 Receive Signaling All Zeros.
0 = interrupt masked
1 = interrupt enabled
SLIP IMR1.4 Elastic Store Slip Occurrence.
0 = interrupt masked
1 = interrupt enabled
RUA1 IMR1.3 Receive Unframed All Ones.
0 = interrupt masked
1 = interrupt enabled
RRA IMR1.2 Receive Remote Alarm.
0 = interrupt masked
1 = interrupt enabled
RCL IMR1.1 Receive Carrier Loss.
0 = interrupt masked
1 = interrupt enabled
RLOS IMR1.0 Receive Loss of Sync.
0 = interrupt masked
1 = interrupt enabled