At83c26, Operational modes, Twi commands – Rainbow Electronics AT83C26 User Manual

Page 10: Twi bus control, Frame structure

7511B–SCR–10/05

AT83C26

Operational Modes

TWI Bus Control

The Atmel Two-wire Interface (TWI) interconnects components on a unique two-wire bus, made
up of one clock line and one data line with speeds of up to 400 Kbits per second, based on a
byte-oriented transfer format.

The TWI-bus interface can be used:

–

To configure the AT83C26

–

To select interface

–

To select the operating mode of the card: 1.8V, 3V or 5V

–

To configure the automatic activation sequence

–

To start or stop sessions (activation and de-activation sequences)

–

To initiate a warm reset

–

To control the clock to the card in active mode

–

To control the clock to the card in stand-by mode (stop LOW, stop HIGH or running)

–

To enter or leave the card stand-by or power-down modes

–

To select the interface (connection to the host I/O/C4/C8)

–

To request the status (card present or not, over-current and out of range supply
voltage occurrence)

–

To drive and monitor the card contacts by software

–

To accurately measure the ATR delay when automatic activation is used

–

Re-use the AT83C24 command set for the first DC/DC and smart card interface with
the following changes:

•CKS extended to CONFIG2[0:3], CKS=8 selects CLK/3 and CKS>8 is reserved

•The slave address byte for TWI write commands is 0100 A

10 and 0100 A

for TWI read commands

TWI Commands

Frame Structure

The structure of the TWI bus data frames is made of one or a series of write and read com-
mands completed by STOP.

Write commands to the AT83C26 have the structure:

ADDRESS BYTE + COMMAND BYTE + DATA BYTE(S)

Read commands to the AT83C26 have the structure:

ADDRESS BYTE + DATA BYTE(S)

The ADDRESS BYTE is sampled on A2/CK and A1/RST after each reset (hard/soft/general
call) but A2/CK, A1/RST can be used for transparent mode after the reset.