User i/os by bank, Footprint migration differences – Xilinx DS610 User Manual
Page 72
Spartan-3A DSP FPGA Family: Pinout Descriptions
DS610 (v3.0) October 4, 2010
Product Specification
72
User I/Os by Bank
and
indicates how the user-I/O pins are distributed between the four I/O banks on the CS484 package.
The AWAKE pin is counted as a dual-purpose I/O.
Footprint Migration Differences
There are no migration footprint differences between the XC3SD1800A and the XC3SD3400A in the CS484 package.
Table 64: User I/Os Per Bank for the XC3SD1800A in the CS484 Package
Package
Edge
I/O Bank
Maximum I/Os
and
Input-Only
All Possible I/O Pins by Type
I/O
INPUT
DUAL
CLK
Top
0
77
49
13
1
6
8
Right
1
78
23
9
30
8
8
Bottom
2
76
33
6
21
8
8
Left
3
78
51
13
0
6
8
TOTAL
309
156
41
52
28
32
Notes:
1.
19 VREF are on INPUT pins.
Table 65: User I/Os Per Bank for the XC3SD3400A in the CS484 Package
Package
Edge
I/O Bank
Maximum I/O
and
Input-Only
All Possible I/O Pins by Type
I/O
INPUT
DUAL
CLK
Top
0
77
49
13
1
6
8
Right
1
78
23
9
30
8
8
Bottom
2
76
33
6
21
8
8
Left
3
78
51
13
0
6
8
TOTAL
309
156
41
52
28
32
Notes:
1.
19 VREF are on INPUT pins.