Xilinx DS610 - Manual (Page 5)

Spartan-3A DSP FPGA Family: Introduction and Ordering Information
DS610 (v3.0) October 4, 2010 www.xilinx.com
Product Specification 5
Package Marking
Figure 2 shows the top marking for Spartan-3A DSP FPGAs. The “5C” and “4I” Speed Grade/Temperature Range part
combinations may be dual marked as “5C/4I”. Devices with the dual mark can be used as either -5C or -4I devices. Devices
with a single mark are only guaranteed for the marked speed grade and temperature range.
Ordering Information
Spartan-3A DSP FPGAs are available in both standard and Pb-free packaging options for all device/package combinations.
The Pb-free packages include a ‘G’ character in the ordering code.
X-Ref Target - Figure 2
Figure 2: Spartan-3A DSP FPGA Package Marking Example
Device Speed Grade Package Type / Number of Pins
Power/Temperature Range
(T
J
)
XC3SD1800A -4 Standard Performance CS484/
CSG484
484-ball Chip-Scale Ball Grid Array (CSBGA) C Commercial (0°C to 85°C)
XC3SD3400A -5 High Performance (1) FG676/
FGG676 676-ball Fine-Pitch Ball Grid Array (FBGA) I Industrial (–40°C to 100°C)
LI Low-power Industrial
(–40°C to 100°C) (2)
Notes:
1. The -5 speed grade is exclusively available in the Commercial temperature range.
2. The low-power option (LI) is exclusively available in the CS(G)484 package and industrial temperature range.
3. See DS705 , XA Spartan-3A DSP Automotive FPGA Family Data Sheet for the XA Automotive Spartan-3A DSP FPGAs.
Lot Code
Date Code
L4 I
SPARTAN
Device Type
BGA Ball A1
Package
Low-Power
(optional)
Speed Grade
Operating Range
R
R
DS610-1_02_070607
CSG484 X GQ ####
X#######X
Mask Revision
Fabrication/
Process Code
XC3SD1800A
-4 CS 484 LI
Device Type
Speed Grade
Power/Temperature Range
Package Type
Number of Pins
Example:
DS610-1_05_021009
XC3SD1800A