Figure 36, Figure 37, Pca9665 – NXP Semiconductors PCA9665 User Manual
Page 73: Nxp semiconductors
PCA9665_2
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 02 — 7 December 2006
73 of 91
NXP Semiconductors
PCA9665
Fm+ parallel bus to I
2
C-bus controller
Fig 36. Reset timing
SDA
SCL
002aab272
t
rst
50 %
30 %
50 %
50 %
30 %
t
rec(rst)
t
w(rst)
RESET
Dn
Dn off
START
t
rst
ACK or read cycle
30 %
Dn on
30 %
Fig 37. Interrupt timing
6
7
8
9
002aac227
D7 to D0
WR
SCL
INT
t
as(int)
write to I2CCON
1
2
3
t
das(int)