NXP Semiconductors PCA9665 - Manual (Page 7)

PCA9665_2 © NXP B.V. 2006. All rights reserved.
Product data sheet Rev. 02 — 7 December 2006 7 of 91
NXP Semiconductors
PCA9665
Fm+ parallel bus to I 2 C-bus controller
Table 4. Indirect register selection by setting A1 = 1 and A0 = 0
Register name Register function INDPTR Read/Write Default
I2CCOUNT byte count 00h R/W 01h
I2CADR own address 01h R/W E0h
I2CSCLL SCL LOW period 02h R/W 9Dh
I2CSCLH SCL HIGH period 03h R/W 86h
I2CTO time-out 04h R/W FFh
I2CPRESET parallel software reset 05h W 00h
I2CMODE I 2 C-bus mode 06h R/W 00h
Fig 6. Register mapping flowchart
002aab459
I2CSTA REGISTER A1 A0 = 00
read?
yes
no
INDPTR REGISTER A1 A0 = 00
write?
yes
no
A1 A0 = 10
read/write? yes
no
INDPTR = 00h
?
yes
I2CCOUNT REGISTER
A1 A0 = 01
read/write?
no
INDPTR = 01h
?
yes
I2CADR REGISTER
I2CDAT REGISTER
yes
A1 A0 = 11
read/write?
INDPTR = 02h
?
yes
I2CSCLL REGISTER
I2CCON REGISTER
yes
INDPTR = 03h
?
yes
I2CSCLH REGISTER
no
no
no
no
INDPTR = 04h
?
yes
I2CTO REGISTER
no
INDPTR = 05h
?
yes I2CPRESET REGISTER
no
INDPTR = 06h
?
yes
I2CMODE REGISTER
no
RESERVED
(write only)