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Figure 13, Pca9665, Nxp semiconductors – NXP Semiconductors PCA9665 User Manual

Page 41

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PCA9665_2

© NXP B.V. 2006. All rights reserved.

Product data sheet

Rev. 02 — 7 December 2006

41 of 91

NXP Semiconductors

PCA9665

Fm+ parallel bus to I

2

C-bus controller

If the LB bit is reset (logic 0), the PCA9665 will return an acknowledge for all the bytes that
will be received. The maximum number of bytes that are received in a single sequence is
defined by BC[6:0] in I2CCOUNT register as shown in

Table 39

.

If the LB bit is set (logic 1) during a transfer, the PCA9665 will return a not acknowledge
(logic 1) on SDA after receiving the last byte. If the AA bit is reset, the I

2

C-bus state

machine does not respond to its own slave address. However, the I

2

C-bus is still

monitored and address recognition may be resumed at any time by setting AA. This
means that the AA bit may be used to temporarily isolate the PCA9665 from the I

2

C-bus.

(1) See

Table 40

.

(2) Defined state when the number of bytes received is equal to the value in I2CCOUNT register and LB = 0.

(3) Defined state when the number of bytes received is equal to the value in I2CCOUNT register and LB = 1.

(4) Number of bytes received is lower than I2CCOUNT.

Fig 13. Format and states in the Slave Receiver Buffered mode (MODE = 1)

S

SLA

W

A

DATA

A

P or S

80h

A0h

A

68h

002aab661

reception of
own slave address
and one or more
data bytes;
all are Acknowledged

last data byte received is
Not Acknowledged

arbitration lost as MST and
addressed as slave

DATA

A

80h

P or S

F8h

A

88h

on STOP

P or S

F8h

on STOP

GENERAL

CALL = 00h

A

DATA

A

P or S

E0h

A0h

A

D8h

DATA

A

E0h

P or S

A

E8h

reception of the
General Call address
and one or more
data bytes

last data byte received is
Not Acknowledged

arbitration lost as MST and
addressed as slave by
General Call

S

F8h

on STOP

W

(2)

(2)

(3)

(2)

(2)

(3)

P or S

F8h

on STOP

A

DATA

A

DATA

60h

D0h

n

This number (contained in I2CSTA) corresponds
to a defined state of the I

2

C-bus.

(1)

DATA

A

any number of data bytes and
their associated Acknowledge bits

from master to slave

from slave to master

(4)

(4)