Figure 2-5. pci to mpc address translation -13, Figure 2-5 – Motorola MVME2300 Series User Manual

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Functional Description

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2-13

Figure 2-5. PCI to MPC Address Translation

All Raven address decoders are prioritized so that programming multiple
decoders to respond to the same address is not a problem. When the PCI
address falls into the range of more than one decoder, only the highest
priority one will respond. The decoders are prioritized as shown below.

RavenMPIC Control Registers

The RavenMPIC control registers are located within either PCI memory or
PCI I/O space using traditional PCI-defined base registers within the
predefined 64-byte header. Refer to the section on

Raven Interrupt

Controller

for more information.

Decoder

Priority

PCI Slave 0

highest

PCI Slave 1

PCI Slave 2

PCI Slave 3

lowest

PCI Bus Address

8 0 8 0 1 2 3 4

PSOFFx Register

9 0 0 0

MPC Bus Address

1 0 8 0 1 2 3 4