Motorola MVME2300 Series - Manual (Page 75)

Functional Description
http://www.motorola.com/computer/literature 2-5
2
Figure 2-2. MPC-to-PCI Address Decoding
The Raven ASIC imposes no limits on how large an address space a map
decoder can represent. There is a minimum of 64KB due to the resolution
of the address compare logic.
For each map, there is an associated set of attributes. These attributes are
used to enable read accesses, enable write accesses, enable write-posting,
and define the PCI transfer characteristics.
Each map decoder also includes a programmable 16-bit address offset. The
offset is added to the 16 most significant bits of the MPC address, and the
result is used as the PCI address. This offset allows PCI devices to reside
at any PCI address, independent of the MPC address map. An example of
this appears in
Figure 2-3 .
MPC Bus Address 8 0 8 0 1 2 3 4
31 16 15 0
MSADDx Register 7 0 8 0 9 0 0 0
31 16 15 0
>= <= and Decode is