Motorola MVME2300 Series - Manual (Page 128)

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Raven PCI Bridge ASIC
2
BUS Bus Number.
Configuration Cycles: Identifies a targeted bus number. If written
with all zeros, a Type 0 Configuration Cycle will be generated. If
written with any value other than all 0s, then a Type 1
Configuration Cycle will be generated.
Special Cycles: Identifies a targeted bus number. If written with all
0s, a Special Cycle will be generated. If written with any value
other than all 0s, then a Special Cycle translated into a Type 1
Configuration Cycle will be generated.
EN Enable.
Configuration Cycles: Writing a 1 to this bit enables
CONFIG_DATA to Configuration Cycle translation. If this bit is a
0, subsequent accesses to CONFIG_DATA will be passed though
as I/O cycles.
Special Cycles: Writing a 1 to this bit enables CONFIG_DATA to
Special Cycle translation. If this bit is a 0, subsequent accesses to
CONFIG_DATA will be passed though as I/O cycles.
CONFIG_DATA Register
The description of the CONFIG_DATA register is also presented in three
perspectives: from the PCI bus, from the MPC bus in big-endian mode, and
from the MPC bus in little-lndian mode. Note that the view from the PCI
bus is purely conceptual, since there is no way to access the
CONFIG_DATA register from the PCI bus.
2Raven PCI Bridge ASIC
0Raven Registers