Measurement Computing Micro 488/EX rev.2.1 - Manual (Page 129)

Section 5 Command Descriptions
5.59
PPOLL CONFIG or PPC
PPOLL CONFIG (Parallel Poll Configure) configures the Parallel Poll response of
a specified bus device. Not all devices support Parallel Polling and, among those that
do, not all support software control of their Parallel Poll response. Some devices are
configured by internal switches.
The Parallel Poll response is set by a four-bit binary number (S P2 P1 P0),
response . The most significant bit of response is the Sense (S) bit. The Sense bit
is used to determine when the device will assert its Parallel Poll response. Each bus
device has an internal individual status (ist). The Parallel Poll response will be asserted
when this ist equals the Sense bit value. ist is normally a logic "1" when the device
requires attention, so the S bit should normally also be a logic "1". If the S bit is "0"
then the device will assert its Parallel Poll response when its ist is a logic "0", i.e. it
does not require attention. However, the meaning of ist can vary between devices, so
refer to your IEEE bus device documentation.
The remaining 3 least significant bits of response, P2, P1, and P0, specify
which DIO bus data line will be asserted by the device in response to a Parallel Poll.
These bits form a binary number with a value from 0 through 7, specifying data lines
DIO1 through DIO8, respectively.
SYNTAX PPOLL CONFIG addr;response
or
PPOLL C addr;response
or
PPC addr;response
addr is a bus address.
response is the decimal equivalent of the four binary bits S, P2,
P1, and P0.
RESPONSE None
MODE CA