Altera Arria V SoC Development Board - Manual (Page 36)

2–28 Chapter 2: Board Components
Components and Interfaces
Arria V SoC Development Board July 2014 Altera Corporation
Reference Manual
The PHY uses a multi-level POR bootstrap encoding scheme to allow a small set of
I/O pins to set up a very large number of default settings within the device. The
related I/O pins have integrated pull-up or pull-down resistors to configure the
device. To change the configuration, connect an external resistor of maximum 5 k to
the pin.
Table 2–20 lists the level encoding scheme.
7 ENET2_MDI_TX_P — 2.5-V Media dependent interface
41 ENET2_RX_CLK AT20 2.5-V MII receive clock
35 ENET2_RX_D0 AW19 2.5-V MII receive data bus
36 ENET2_RX_D1 AL22 2.5-V MII receive data bus
37 ENET2_RX_D2 AH22 2.5-V MII receive data bus
38 ENET2_RX_D3 AU20 2.5-V MII receive data bus
39 ENET2_RX_DV AP20 2.5-V MII receive data valid
40 ENET2_RX_ERROR AN22 2.5-V MII receive error
29 ENET2_TX_CLK_FB AN21 2.5-V 25-MHz MII transmit clock
23 ENET2_TX_D0 AT21 2.5-V MII transmit data bus
24 ENET2_TX_D1 AR21 2.5-V MII transmit data bus
25 ENET2_TX_D2 AK21 2.5-V MII transmit data bus
26 ENET2_TX_D3 AP22 2.5-V MII transmit data bus
28 ENET2_TX_EN AW20 2.5-V MII transmit enable
1 ENET_DUAL_RESETN AV22 2.5-V Device reset
62 ENET_FPGA_MDC AG22 2.5-V Management bus data clock
63 ENET_FPGA_MDIO AK22 2.5-V Management bus data
Table 2–19. Ethernet PHY (FPGA) Pin Assignments, Signal Names and Functions (Part 2 of 2)
Board
Reference
(U55)
Schematic Signal Name
Arria V SoC Pin
Number
I/O Standard Description
Table 2–20. Ethernet PHY (FPGA) Bootstrap Encoding Scheme
Board Reference
(U55)
Schematic Signal Name Description Strapping Option
36 ENET2_RX_D1
Auto-negotiation disabled.
100 base-T default.
Pulled low
35 ENET2_RX_D0 Full duplex operation Pulled high
41 ENET2_RX_CLK Disable quick auto negotiation Pulled low
58 ENET1_RX_ERROR MII mode operation Pulled low
59 ENET1_RX_CLK AUTOMDI-X enabled Pulled high
39 ENET2_RX_DV Transmit mode for PHY1 Pulled high
53 ENET1_RX_D0
Auto-negotiation disabled.
10 base-T default.
Pulled low
53 ENET1_RX_D0 Address for SMI Pulled low
54 ENET1_RX_D1 Address for SMI Pulled low