Altera QDRII SRAM Controller MegaCore Function User Manual
Page 19
Altera Corporation
MegaCore Version 9.1
2–9
November 2009
QDRII SRAM Controller MegaCore Function User Guide
Getting Started
describes the generated files and other files that may be in your
project directory. The names and types of files specified in the IP
Toolbench report vary based on whether you created your design with
VHDL or Verilog HDL
Table 2–1. Generated Files (Part 1 of 2)
,
Filename
Description
Quartus II symbol file for the MegaCore function
variation. You can use this file in the Quartus II block
diagram editor.
MegaCore function report file.
A MegaCore function variation file, which defines a
VHDL or Verilog HDL top-level description of the custom
MegaCore function. Instantiate the entity defined by this
file inside of your design. Include this file when compiling
your design in the Quartus II software.
Verilog HDL black-box file for the MegaCore function
variation. Use this file when using a third-party EDA tool
to synthesize your design.
File that instantiates the control logic and the datapath.
The address and command output registers.
wrap.vhd or .v
File that instantiates the controller.
wrap.vho or .vo
VHDL or Verilog HDL IP functional simulation model.
vhd or .v
File that contains all the capture group modules (CQ and
CQN group modules and read capture registers).
.v
The clock output generators.
The CQ and CQN module.
or .v
Datapath.
DLL.
.vhd or .v
The example driver.
The read capture registers.