Document revision history – Altera Internal Memory (RAM and ROM) IP Core User Manual
Page 56
Document Revision History
A
2014.12.17
UG-01068
Document Revision History
This table lists the document revision history for the user guide.
Table A-1: Document Revision History
Date
Version
Changes
December 2014
2014.12.17
• Specified that to enable byte enable for port A and port
B, the data width ratio has to be 1 or 2 for the RAM: 1-
PORT and RAM: 2-PORT IP cores.
• Updated document template.
2014.06.30
5.0
• Replaced MegaWizard Plug-In Manager information
with IP Catalog.
• Added standard information about upgrading IP cores.
• Added standard installation and licensing information.
• Removed outdated device support level information. IP
core device support is now available in IP Catalog and
parameter editor.
• Removed all references to obsolete SOPC Builder tool.
May 2014
4.4
Editorial fix to Table 4–1 on page 4–5.
November 2013
4.3
Updated Table 3–8 on page 3–18 to update M20K block
information.
May 2013
4.2
Updated Table 3–4 on page 3–11 to fix a typographical
error.
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