Altera SoC Embedded Design Suite - Manual (Page 77)

Figure 4-36: Debugging Session window
8. Click Disconnect from Target button to close the debugging session.
Getting Started with the Hardware Library
The SoC Hardware Libraries example program is part of the Altera ® SoC Embedded Design Suite (EDS).
You can run the sample program on a Cyclone V SoC development kit board.
The example program demonstrates using the Hardware Library to programmatically configure the
FPGA and exercise soft IP control from the hard processor system (HPS).
Hardware Library Sample Application Overview
The Bare Metal sample application uses the HWLIB API to:
• Programmatically configure the FPGA from the HPS
• Initialize and bring up the Advanced eXtensible Interface (AXI) bridge interfaces between the HPS and
the FPGA
• Exercise the FPGA soft IP parallel I/O (PIO) core from the HPS to toggle the development board LEDs
The sample application uses the development kit Golden System Reference Design (GSRD) FPGA
configuration. The sample application uses the following files:
• FPGA configuration SRAM Object File (
.sof )
• Preloader executable file for proper initialization of the GSRD HPS component
4-58 Getting Started with the Hardware Library
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2014.12.15
Altera Corporation Getting Started Guides
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